Wykaz publikacji wybranego autora

Jacek Jasielski, dr inż.

adiunkt

Wydział Informatyki, Elektroniki i Telekomunikacji
WIEiT-ke, *Katedra Elektroniki


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OPI Nauka Polska




1
  • 2.5V 14 MHz CMOS current mode 6-th order elliptic lowpass filter
2
  • 2.5V 14 MHz CMOS current mode 6-th order elliptic lowpass filter
3
  • A new ADC based on asynchronous operation
4
  • An analog dual delay locked loop using coarse and fine programmable delay elements
5
  • Broadband quarter-square 4Q analog multiplier based on CMOS inverters
6
  • CMOS current mode filters with arbitrary characteristics employing multiple loop feedback architectures
7
  • Current controlled delay line elements' improvement study
8
  • Double edge class BD hybrid DPWM implementation using linearized LBDD algorithm
9
  • Experimental results for low voltage current conveyors based on CMOS inverters in 0.35um technology
10
  • Four-quadrant analog multiplier based on CMOS inverters
11
  • Four-quadrant CMOS transconductance multiplier operating at low voltage and high-speed
12
  • Low voltage analog multipliers based on CMOS inverters
13
  • Low voltage charge-pump-based Sigma-Delta modulator using CMOS inverters as building blocks
14
  • Low voltage charge-pump-based VCO circuits using CMOS inverters as building blocks
15
  • Low voltage CMOS voltage-controlled multivibrator and resonant VCO circuits
16
  • Low voltage current feedback amplifier based on CMOS inverters suitable for deep submicron technology
17
  • Low voltage current mode analog circuits based on CMOS inverters
18
  • Low voltage current mode continous time analog filter implementation suitable for deep submicron CMOS technology
19
  • Low voltage low frequency continuous time CMOS antialiasing filters
20
  • Low voltage, low power analog multipliers based on CMOS inverters
21
  • Low voltage multipliers in CMOS technology
22
  • Monolithic active pixel detector in SOI technology
23
  • New low voltage analog filters based on CMOS inverters for low frequency applications
24
  • Niskonapięciowe konwejery prądowe drugiej i trzeciej generacji, zrealizowane w oparciu o inwertery CMOS
25
  • Niskonapięciowy czteroćwiartkowy układ mnożący, zrealizowany w oparciu o inwertery CMOS