Wykaz publikacji wybranego autora

Michał Karwatowski, mgr inż.

asystent

Wydział Informatyki, Elektroniki i Telekomunikacji
WIEiT-ke, Katedra Elektroniki

[dyscyplina wiodąca] dziedzina nauk inżynieryjno-technicznych / informatyka techniczna i telekomunikacja

[dyscyplina dodatkowa] dziedzina nauk inżynieryjno-technicznych / automatyka, elektronika i elektrotechnika (25%)


Identyfikatory Autora Informacje o Autorze w systemach zewnętrznych

ORCID: 0000-0001-6285-136X

ResearcherID: brak

Scopus: 57189294331

System Informacyjny AGH (SkOs)




Opisy publikacji wcześniejszych zobacz: bpp.agh.edu.pl/old.


Liczba pozycji spełniających powyższe kryteria selekcji: 23, z ogólnej liczby 23 publikacji Autora


1
  • Accelerated computing heterogeneous cluster
2
  • A custom co-processor for the discovery of low autocorrelation binary sequences
3
  • A study of parallel techniques for dimensionality reduction and its impact on the quality of text processing algorithms
4
  • A system for the content based scientific literature retrieval
5
  • Comparison of semantic vectors with reduced precision using the cosine similarity measure
6
  • Cosine similarity metric calculation on low power heterogeneous computing platform
7
  • Detection of electronic components for mobile applications
8
  • Documents similarity calculation in the low-power cluster
9
  • Energy efficient calculations of text similarity measure on FPGA-accelerated computing platforms
10
  • Energy efficient calculations of text similarity measure on FPGA-accelerated computing platforms
11
  • FPGA-based low-energy cluster for acceleration of the document similarity analysis
12
  • FPGA acceleration of text similarity measure with gracefully reduced vector precision
13
  • FPGA implementation of procedures for video quality assessment
14
  • Hardware aware neural network compression
15
  • High level framework for mapping deep learning neural models to FPGAs
16
  • Improving text classification with vectors of reduced precision
17
  • Real time 8K video quality assessment using FPGA
18
  • Scalability analysis of neural networks on multiple GPGPUs
19
  • Semantic search extension based on Polish WordNet relations in business document exploration
20
  • Speeding up the search for Low Autocorrelation Binary Sequences with Altera OpenCL compiler for FPGAs
21
  • The assessment of the Apache Solr in the text similarity search
22
  • The Java profiler based on byte code analysis and instrumentation for many-core hardware accelerators
23
  • The versatile hardware accelerator framework for sparse vector calculations