Wykaz publikacji wybranego autora

Robert Szczygieł, dr hab. inż., prof. AGH

profesor nadzwyczajny

Wydział Elektrotechniki, Automatyki, Informatyki i Inżynierii Biomedycznej
WEAIiIB-kmie, Katedra Metrologii i Elektroniki

[dyscyplina wiodąca] dziedzina nauk inżynieryjno-technicznych / automatyka, elektronika i elektrotechnika


[poprzednia klasyfikacja] obszar nauk technicznych / dziedzina nauk technicznych / elektronika


Identyfikatory Autora Informacje o Autorze w systemach zewnętrznych

ORCID: 0000-0001-6342-0107

ResearcherID: B-5662-2011

Scopus: 6603163212

PBN: 909859

OPI Nauka Polska

System Informacyjny AGH (SkOs)





Liczba pozycji spełniających powyższe kryteria selekcji: 208, z ogólnej liczby 224 publikacji Autora


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  • 23552-channel IC for single photon counting pixel detectors with 75 $\mu m$ pitch, ENC of 89 $e^{-}$ rms, 19 $e^{-}$ rms offset spread and 3\% rms gain spread
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  • 32k channel readout IC for single photon counting pixel detectors with 75$\mu$m pitch, dead time of 85 ns, 9 ${e^{-}rms}$ offset spread and 2\% rms gain spread
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  • 32k channels readout IC for single photon counting detectors with 75 $\mu$ pitch, ENC of 123 $e^{-}$ rms, 9$e^{-}$ rms offset spread and 2\% rms gain spread
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  • 3-D integrated 2 cm × 2 cm, 65k pixel X-ray detection module with through-silicon vias
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  • 64 Channel acquisition system for recording biomedical signals
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  • 64 channel ASIC for neurobiology experiments
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  • 64 channel neural recording amplifier with tunable bandwidth in 180 nm CMOS technology
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  • A bidirectional 64-channel neurochip for recording and stimulation neural network activity
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  • A family of integrated circuits in submicron technology for in vivo and in vitro high density MEA experiments
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  • A fast 300k X-ray camera with an energy window selection and continuous readout mode
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  • A first-level event selector for the CBM experiment at FAIR
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  • A layer correlation technique for pion energy calibration at the 2004 ATLAS Combined Beam Test
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  • A low noise, fast pixel readout IC working in single photon counting mode with energy window selection in 90 nm CMOS
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  • A pixel readout chip designed in 90nm CMOS process for high count rate imaging systems
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  • A pixel readout chip in 40 nm CMOS process for high count rate imaging systems with minimization of charge sharing effects
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  • A protocol for hit and control synchronous transfer for the front-end electronics at the CBM experiment
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  • A prototype chip for pixel hybrid detector in 90 nm CMOS technology
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  • A prototype pixel readout IC for high count rate X-ray imaging systems in 90 nm CMOS technology
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  • A state of the art rad-hard digital ASIC design for high energy physics experiments
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  • Active feedback with leakage current compensation for charge sensitive amplifier used in hybrid pixel detector
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  • ADCs in deep submicron technologies for ASICs of pixel architecture
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  • Addressing of imperfection of a hybrid pixel sensor for X-ray detection with a circuit for charge sharing cancellation implemented
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  • Algorithms for minimization of charge sharing effects in a hybrid pixel detector taking into account hardware limitations in deep submicron technology